Fix striding in mdspan 1d copies

[divyegala]

I accidentally stumbled upon this bug, while trying to convert a 4096 1D mdspan from int32 to int64. This approach leads to 0 + 1 + … + 4095 = 8,386,560 iterations on the device, leading to incredibly degenerate performance.

raft::copy uses a CUDA kernel for type-converting mdspan copies. That kernel converts each flat thread index into an mdspan coordinate.

For a 1-D vector of four elements, the old code finds element 3 by repeatedly subtracting the stride:

increment = 3, stride = 1

3 → 2 → 1 → 0   # three loop iterations

Copying all four elements performs 0 + 1 + 2 + 3 = 6 iterations just to recover coordinates. For an N-element vector, this grows to roughly N² / 2.

Replace the repeated-subtraction loop with division and multiplication:

index = increment / stride
increment -= index * stride

This makes coordinate calculation constant-time per element while preserving the existing general mdspan copy behavior.

In general, the previous subtraction approach is leads to degenerate performance in N-D matrices when one or few dimensions are far larger than others.

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📝 Summary

Summary by CodeRabbit

• Bug Fixes

  • Improved multidimensional index calculation and boundary handling during copy operations.
  • Prevented potential issues when processing indices at dimension limits.

• Tests

  • Expanded one-dimensional CUDA device-to-device copy coverage to include sizes around key boundaries, including 1,023, 1,024, 1,025, 4,096, and 4,097 elements.
  • Continued validating kernel dispatch, memory allocation, synchronization, value conversion, and correct copy results.

Walkthrough

Changes

The copy implementation now uses quotient-based multidimensional index advancement. The CUDA test now validates 1D device-to-device mdspan copying across five sizes, including tile-boundary cases.

Changes

Mdspan copy indexing and CUDA validation

Layer / File(s)	Summary
Quotient-based index advancement cpp/include/raft/core/detail/copy.hpp	increment_indices uses quotient arithmetic, maximum-index clamping, and remainder updates for multidimensional index advancement.
CUDA mdspan copy validation cpp/tests/core/mdspan_copy.cu	The parameterized test preserves dispatch, allocation, synchronization, conversion, and output checks for sizes 1023, 1024, 1025, 4096, and 4097.

Estimated code review effort: 2 (Simple) | ~10 minutes

Merge Risk: ⚪ Minimal · up to 49b32

The change expands CUDA mdspan copy coverage around tile boundaries while retaining conversion and execution checks. No current merge-blocking risk is identified.

Suggested reviewers: achirkin

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Docstring Coverage	⚠️ Warning	Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 3 functions across 2 files.	Write docstrings for the functions missing them to satisfy the coverage threshold.

✅ Passed checks (4 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly identifies the main change: fixing striding behavior in 1D mdspan copies.
Description check	✅ Passed	The description directly explains the performance bug, the coordinate-calculation change, and the affected CUDA mdspan copy behavior.
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.

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Actionable comments posted: 1

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Inline comments:
In `@cpp/tests/core/mdspan_copy.cu`:
- Line 22: Update the mdspan copy test’s cols coverage around the existing
tile-sized value to include a partial-tile case, preferably parameterizing
nontrivial and boundary sizes such as 1023, 1024, 1025, and 4097, so tail
threads exercise valid_index == false while retaining the exact-tile coverage.

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• cpp/tests/core/mdspan_copy.cu

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[achirkin]

LGTM

[achirkin]

/merge