Asynchronous_RV32_Processor

Architecture: RISC-V 32-bit Integer ISA
Microarchitecture: In-order, 4-stage, Asynchronous

Name		Name	Last commit message	Last commit date
Latest commit History 43 Commits
ALU.v		ALU.v
Asynchronous_Core.v		Asynchronous_Core.v
Branch.v		Branch.v
Data_RAM.v		Data_RAM.v
Decode.v		Decode.v
Execute.v		Execute.v
Fetch.v		Fetch.v
Loadstore.v		Loadstore.v
Prog_Count.v		Prog_Count.v
Prog_Mem.v		Prog_Mem.v
RAM.v		RAM.v
README.md		README.md

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