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perf: Reduce Box and Arc allocation churn during tree rewriting#21749

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Dandandan merged 3 commits intoapache:mainfrom
neilconway:neilc/perf-planner-box-arc-take
Apr 21, 2026
Merged

perf: Reduce Box and Arc allocation churn during tree rewriting#21749
Dandandan merged 3 commits intoapache:mainfrom
neilconway:neilc/perf-planner-box-arc-take

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@neilconway
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@neilconway neilconway commented Apr 20, 2026

Which issue does this PR close?

Rationale for this change

Profiling the planner suggests that a surprising amount of time was being spent doing tree rewriting in the logical optimizer. One culprit is TreeNodeContainer::map_elements() for Box<C> and Arc<C>, which do the following:

  • Fetch the inner C value from the Box/Arc
  • Pass the innter value to the closure
  • Wrap the return value of the closure in a newly allocated Box / Arc, respectively

This allocates a fresh Box or Arc for every node visited while walking an expression or logical plan, even if the tree rewrite we're doing didn't modify the expression/plan node.

Instead, we can reuse the current Box<C> or Arc<C>: use std::mem::take() to swap the inner value with C::default(), pass the inner value to the closure, and put the result back in the original container. Swapping the inner value with C::default() means the container always has a valid value, which is important if the closure panics.

For Arc<C>, we need to use Arc::make_mut(), which only clones if the Arc is not unique.

This reduces the bytes allocated to plan TPC-H Q13 by ~22% (988 kB -> 765 kB), and reduces allocated blocks by 8.5% (210k -> 192k).

What changes are included in this PR?

  • Optimize Box<C>::map_elements() and Arc<C>::map_elements() as described above
  • Change map_children() for Expr::Alias to use map_elements(), rather than invoking f(*expr) directly; this ensures that it can take advantage of this optimization
  • Make LogicalPlan::default() use a shared DFSchema, rather than allocating a fresh DFSchema for every call. Because default() is not in the hot path for tree rewriting, it is important that it is cheap
  • Add unit tests for new map_elements() behavior
  • Add note to migration guide for breaking API change

Are these changes tested?

Yes, plus new unit tests added.

Are there any user-facing changes?

Yes: TreeNodeContainer impls for Box<C> and Arc<C> now require C: Default. This is a breaking API change for third-party code that implements TreeNodeContainer for a custom type. The fix is usually straightforward.

@github-actions github-actions Bot added logical-expr Logical plan and expressions common Related to common crate labels Apr 20, 2026
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run benchmark sql_planner

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🤖 Criterion benchmark running (GKE) | trigger
Instance: c4a-highmem-16 (12 vCPU / 65 GiB) | Linux bench-c4283309752-1613-kgmmg 6.12.55+ #1 SMP Sun Feb 1 08:59:41 UTC 2026 aarch64 GNU/Linux

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected

Comparing neilc/perf-planner-box-arc-take (561de69) to a311d14 (merge-base) diff
BENCH_NAME=sql_planner
BENCH_COMMAND=cargo bench --features=parquet --bench sql_planner
BENCH_FILTER=
Results will be posted here when complete


File an issue against this benchmark runner

@neilconway neilconway changed the title perf: Avoid Box and Arc allocation churn in the planner perf: Reduce Box and Arc allocation churn in the planner Apr 20, 2026
@neilconway neilconway changed the title perf: Reduce Box and Arc allocation churn in the planner perf: Reduce Box and Arc allocation churn in the optimizer Apr 20, 2026
@neilconway neilconway changed the title perf: Reduce Box and Arc allocation churn in the optimizer perf: Reduce Box and Arc allocation churn in logical optimizer Apr 20, 2026
@neilconway neilconway marked this pull request as ready for review April 20, 2026 20:43
@github-actions github-actions Bot added the documentation Improvements or additions to documentation label Apr 20, 2026
@neilconway neilconway changed the title perf: Reduce Box and Arc allocation churn in logical optimizer perf: Reduce Box and Arc allocation churn during tree rewriting Apr 20, 2026
@Dandandan
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run benchmark tpch

@Dandandan
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run benchmark sql_planner

@Dandandan
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@neilconway which tool are you using for profiling, I wonder?

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🤖 Benchmark running (GKE) | trigger
Instance: c4a-highmem-16 (12 vCPU / 65 GiB) | Linux bench-c4286054870-1653-68t66 6.12.55+ #1 SMP Sun Feb 1 08:59:41 UTC 2026 aarch64 GNU/Linux

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected

Comparing neilc/perf-planner-box-arc-take (71924ef) to a311d14 (merge-base) diff using: tpch
Results will be posted here when complete


File an issue against this benchmark runner

@adriangbot
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🤖 Criterion benchmark running (GKE) | trigger
Instance: c4a-highmem-16 (12 vCPU / 65 GiB) | Linux bench-c4286055749-1654-sns79 6.12.55+ #1 SMP Sun Feb 1 08:59:41 UTC 2026 aarch64 GNU/Linux

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected

Comparing neilc/perf-planner-box-arc-take (71924ef) to a311d14 (merge-base) diff
BENCH_NAME=sql_planner
BENCH_COMMAND=cargo bench --features=parquet --bench sql_planner
BENCH_FILTER=
Results will be posted here when complete


File an issue against this benchmark runner

fn map_elements<F: FnMut(T) -> Result<Transformed<T>>>(
self,
mut self,
f: F,
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Optimizing this API is great, but I wonder two things:

  • Do we call this API too much in some passes? i.e. should we make some optimizer pass more efficient by avoiding / reducing the need to call this API at all in some places?
  • Are we using the "wrong" abstractions that inherently lead to inneficient code? (I.e. lot's of closures, branches, nesting -> hard to optimize for compiler)

@Dandandan
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run benchmark clickbench_partitioned

@adriangbot
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🤖 Benchmark running (GKE) | trigger
Instance: c4a-highmem-16 (12 vCPU / 65 GiB) | Linux bench-c4286090516-1655-dq5wc 6.12.55+ #1 SMP Sun Feb 1 08:59:41 UTC 2026 aarch64 GNU/Linux

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected

Comparing neilc/perf-planner-box-arc-take (71924ef) to a311d14 (merge-base) diff using: clickbench_partitioned
Results will be posted here when complete


File an issue against this benchmark runner

@adriangbot
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🤖 Benchmark completed (GKE) | trigger

Instance: c4a-highmem-16 (12 vCPU / 65 GiB)

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected
Details

Comparing HEAD and neilc_perf-planner-box-arc-take
--------------------
Benchmark clickbench_partitioned.json
--------------------
┏━━━━━━━━━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━━━━━━━━┓
┃ Query     ┃                                  HEAD ┃       neilc_perf-planner-box-arc-take ┃        Change ┃
┡━━━━━━━━━━━╇━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━━━━━━━━┩
│ QQuery 0  │          1.18 / 4.48 ±6.41 / 17.31 ms │          1.18 / 4.48 ±6.44 / 17.36 ms │     no change │
│ QQuery 1  │        12.51 / 13.01 ±0.29 / 13.37 ms │        12.38 / 12.83 ±0.24 / 13.04 ms │     no change │
│ QQuery 2  │        36.67 / 36.97 ±0.20 / 37.20 ms │        36.43 / 36.74 ±0.24 / 37.16 ms │     no change │
│ QQuery 3  │        32.45 / 33.45 ±1.14 / 35.54 ms │        31.81 / 32.12 ±0.26 / 32.50 ms │     no change │
│ QQuery 4  │     265.21 / 266.34 ±1.03 / 268.27 ms │     256.95 / 262.17 ±3.98 / 267.39 ms │     no change │
│ QQuery 5  │     304.48 / 308.45 ±3.07 / 312.90 ms │     293.54 / 295.57 ±1.43 / 297.57 ms │     no change │
│ QQuery 6  │           7.07 / 7.94 ±0.60 / 8.87 ms │           6.71 / 7.71 ±0.82 / 9.21 ms │     no change │
│ QQuery 7  │        14.04 / 17.63 ±5.88 / 29.32 ms │        14.45 / 14.68 ±0.31 / 15.29 ms │ +1.20x faster │
│ QQuery 8  │     366.74 / 372.74 ±8.03 / 388.58 ms │     362.11 / 365.36 ±2.81 / 369.08 ms │     no change │
│ QQuery 9  │    501.08 / 531.41 ±17.41 / 549.84 ms │     526.09 / 534.29 ±6.47 / 542.01 ms │     no change │
│ QQuery 10 │        74.99 / 77.53 ±3.21 / 83.83 ms │        75.14 / 77.08 ±2.17 / 81.30 ms │     no change │
│ QQuery 11 │        85.68 / 86.40 ±0.62 / 87.30 ms │        85.81 / 86.49 ±0.49 / 87.01 ms │     no change │
│ QQuery 12 │     298.21 / 303.39 ±4.38 / 308.71 ms │     293.21 / 295.91 ±1.95 / 299.07 ms │     no change │
│ QQuery 13 │    423.21 / 435.65 ±12.57 / 457.37 ms │    425.62 / 442.37 ±12.27 / 459.61 ms │     no change │
│ QQuery 14 │     301.43 / 310.63 ±7.69 / 324.55 ms │     304.21 / 308.92 ±3.17 / 312.59 ms │     no change │
│ QQuery 15 │     330.28 / 334.73 ±3.29 / 339.52 ms │    343.32 / 360.11 ±20.10 / 397.33 ms │  1.08x slower │
│ QQuery 16 │     688.00 / 692.59 ±5.97 / 704.33 ms │     695.14 / 699.67 ±3.16 / 704.97 ms │     no change │
│ QQuery 17 │     679.63 / 686.39 ±5.95 / 694.72 ms │     694.23 / 696.01 ±2.32 / 700.13 ms │     no change │
│ QQuery 18 │ 1381.81 / 1441.68 ±50.88 / 1504.33 ms │ 1410.41 / 1480.44 ±52.46 / 1556.15 ms │     no change │
│ QQuery 19 │       33.50 / 52.25 ±23.29 / 94.72 ms │      29.79 / 52.96 ±42.27 / 137.43 ms │     no change │
│ QQuery 20 │    522.92 / 535.98 ±15.43 / 561.58 ms │    520.26 / 530.85 ±13.63 / 557.29 ms │     no change │
│ QQuery 21 │     594.70 / 597.19 ±1.80 / 599.68 ms │     596.90 / 601.17 ±3.73 / 606.64 ms │     no change │
│ QQuery 22 │  1051.80 / 1061.96 ±7.77 / 1074.78 ms │  1060.88 / 1062.92 ±1.64 / 1065.56 ms │     no change │
│ QQuery 23 │ 3333.88 / 3359.04 ±21.32 / 3393.74 ms │ 3306.29 / 3321.83 ±13.26 / 3341.63 ms │     no change │
│ QQuery 24 │        43.49 / 48.08 ±3.75 / 54.05 ms │        42.77 / 46.72 ±2.63 / 49.64 ms │     no change │
│ QQuery 25 │     116.20 / 116.81 ±0.67 / 117.91 ms │     112.83 / 114.99 ±1.43 / 116.84 ms │     no change │
│ QQuery 26 │        44.56 / 45.30 ±0.65 / 46.20 ms │        42.80 / 44.67 ±1.32 / 46.66 ms │     no change │
│ QQuery 27 │     674.48 / 679.11 ±3.07 / 682.12 ms │     670.24 / 674.87 ±2.59 / 677.77 ms │     no change │
│ QQuery 28 │ 3023.51 / 3039.73 ±12.15 / 3060.67 ms │ 2989.35 / 3019.75 ±19.25 / 3047.90 ms │     no change │
│ QQuery 29 │        44.13 / 49.07 ±3.68 / 53.30 ms │        42.88 / 47.67 ±3.76 / 54.22 ms │     no change │
│ QQuery 30 │    324.74 / 336.67 ±11.20 / 356.92 ms │    333.09 / 362.60 ±36.62 / 433.56 ms │  1.08x slower │
│ QQuery 31 │    327.50 / 342.18 ±11.17 / 360.87 ms │    333.25 / 346.18 ±12.78 / 369.70 ms │     no change │
│ QQuery 32 │ 1029.77 / 1038.35 ±14.62 / 1067.49 ms │ 1073.16 / 1146.78 ±42.90 / 1197.41 ms │  1.10x slower │
│ QQuery 33 │ 1454.57 / 1478.01 ±16.08 / 1498.65 ms │ 1432.35 / 1458.77 ±29.16 / 1514.61 ms │     no change │
│ QQuery 34 │ 1466.64 / 1498.65 ±21.32 / 1533.07 ms │ 1469.42 / 1488.33 ±10.85 / 1502.76 ms │     no change │
│ QQuery 35 │     323.33 / 325.89 ±2.71 / 330.88 ms │     322.41 / 326.86 ±6.01 / 338.74 ms │     no change │
│ QQuery 36 │        63.80 / 65.57 ±1.25 / 67.56 ms │        66.56 / 69.27 ±2.05 / 71.66 ms │  1.06x slower │
│ QQuery 37 │        37.99 / 39.69 ±1.20 / 41.48 ms │        38.11 / 38.78 ±0.88 / 40.50 ms │     no change │
│ QQuery 38 │        41.76 / 43.18 ±0.86 / 44.12 ms │        41.27 / 42.38 ±0.89 / 43.50 ms │     no change │
│ QQuery 39 │     123.03 / 134.33 ±6.12 / 141.35 ms │     127.89 / 135.36 ±4.96 / 143.40 ms │     no change │
│ QQuery 40 │        15.47 / 18.84 ±2.90 / 23.30 ms │        15.86 / 19.37 ±2.40 / 23.42 ms │     no change │
│ QQuery 41 │        14.39 / 16.31 ±1.86 / 19.44 ms │        15.34 / 16.46 ±1.44 / 19.27 ms │     no change │
│ QQuery 42 │        14.16 / 14.37 ±0.18 / 14.67 ms │        14.01 / 14.37 ±0.32 / 14.92 ms │     no change │
└───────────┴───────────────────────────────────────┴───────────────────────────────────────┴───────────────┘
┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━━━━━┓
┃ Benchmark Summary                              ┃            ┃
┡━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━━━━━┩
│ Total Time (HEAD)                              │ 20897.97ms │
│ Total Time (neilc_perf-planner-box-arc-take)   │ 20996.85ms │
│ Average Time (HEAD)                            │   486.00ms │
│ Average Time (neilc_perf-planner-box-arc-take) │   488.30ms │
│ Queries Faster                                 │          1 │
│ Queries Slower                                 │          4 │
│ Queries with No Change                         │         38 │
│ Queries with Failure                           │          0 │
└────────────────────────────────────────────────┴────────────┘

Resource Usage

clickbench_partitioned — base (merge-base)

Metric Value
Wall time 110.0s
Peak memory 39.3 GiB
Avg memory 28.0 GiB
CPU user 1087.6s
CPU sys 88.3s
Peak spill 0 B

clickbench_partitioned — branch

Metric Value
Wall time 110.0s
Peak memory 40.1 GiB
Avg memory 27.3 GiB
CPU user 1085.2s
CPU sys 94.3s
Peak spill 0 B

File an issue against this benchmark runner

})
.ok()
}));
assert!(result.is_err());
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It doesn't verify the actual panic-safety invariant — that dropping an unwound Box doesn't double-free or access garbage

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True, although I'm not sure there's a good way to validate that in a standard unit test (unless we run under miri or similar). wdyt?

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🤖 Criterion benchmark completed (GKE) | trigger

Instance: c4a-highmem-16 (12 vCPU / 65 GiB)

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected
Details

group                                                 main                                   neilc_perf-planner-box-arc-take
-----                                                 ----                                   -------------------------------
logical_aggregate_with_join                           1.05    427.6±1.02µs        ? ?/sec    1.00    406.4±0.77µs        ? ?/sec
logical_plan_struct_join_agg_sort                     1.06    174.6±0.79µs        ? ?/sec    1.00    164.0±0.47µs        ? ?/sec
logical_select_all_from_1000                          1.05      8.3±0.01ms        ? ?/sec    1.00      7.9±0.01ms        ? ?/sec
logical_select_one_from_700                           1.03    275.7±1.26µs        ? ?/sec    1.00    268.0±1.14µs        ? ?/sec
logical_trivial_join_high_numbered_columns            1.05    261.7±0.73µs        ? ?/sec    1.00    249.5±0.70µs        ? ?/sec
logical_trivial_join_low_numbered_columns             1.05    245.4±0.84µs        ? ?/sec    1.00    234.5±0.72µs        ? ?/sec
physical_intersection                                 1.06    575.0±2.10µs        ? ?/sec    1.00    544.4±1.85µs        ? ?/sec
physical_join_consider_sort                           1.03   1018.9±3.10µs        ? ?/sec    1.00    989.8±4.91µs        ? ?/sec
physical_join_distinct                                1.05    240.0±0.81µs        ? ?/sec    1.00    229.0±0.81µs        ? ?/sec
physical_many_self_joins                              1.03      7.7±0.02ms        ? ?/sec    1.00      7.5±0.02ms        ? ?/sec
physical_plan_clickbench_all                          1.01    127.4±0.31ms        ? ?/sec    1.00    126.2±0.34ms        ? ?/sec
physical_plan_clickbench_q1                           1.04   1370.7±8.30µs        ? ?/sec    1.00   1320.7±4.93µs        ? ?/sec
physical_plan_clickbench_q10                          1.02      2.0±0.01ms        ? ?/sec    1.00   1985.2±6.11µs        ? ?/sec
physical_plan_clickbench_q11                          1.02      2.2±0.01ms        ? ?/sec    1.00      2.2±0.01ms        ? ?/sec
physical_plan_clickbench_q12                          1.02      2.3±0.01ms        ? ?/sec    1.00      2.3±0.01ms        ? ?/sec
physical_plan_clickbench_q13                          1.02      2.1±0.01ms        ? ?/sec    1.00      2.0±0.01ms        ? ?/sec
physical_plan_clickbench_q14                          1.02      2.2±0.01ms        ? ?/sec    1.00      2.2±0.01ms        ? ?/sec
physical_plan_clickbench_q15                          1.02      2.1±0.01ms        ? ?/sec    1.00      2.1±0.01ms        ? ?/sec
physical_plan_clickbench_q16                          1.02   1743.1±5.75µs        ? ?/sec    1.00   1707.1±6.24µs        ? ?/sec
physical_plan_clickbench_q17                          1.02   1788.5±4.82µs        ? ?/sec    1.00   1755.3±6.99µs        ? ?/sec
physical_plan_clickbench_q18                          1.03   1622.4±5.88µs        ? ?/sec    1.00   1571.6±6.00µs        ? ?/sec
physical_plan_clickbench_q19                          1.02   1995.5±5.02µs        ? ?/sec    1.00   1955.8±6.84µs        ? ?/sec
physical_plan_clickbench_q2                           1.03   1785.3±6.18µs        ? ?/sec    1.00   1740.3±7.98µs        ? ?/sec
physical_plan_clickbench_q20                          1.04   1532.3±7.48µs        ? ?/sec    1.00   1478.6±6.89µs        ? ?/sec
physical_plan_clickbench_q21                          1.03   1771.4±6.70µs        ? ?/sec    1.00   1711.5±4.71µs        ? ?/sec
physical_plan_clickbench_q22                          1.01      2.2±0.01ms        ? ?/sec    1.00      2.2±0.01ms        ? ?/sec
physical_plan_clickbench_q23                          1.01      2.4±0.01ms        ? ?/sec    1.00      2.4±0.01ms        ? ?/sec
physical_plan_clickbench_q24                          1.01      5.7±0.02ms        ? ?/sec    1.00      5.6±0.01ms        ? ?/sec
physical_plan_clickbench_q25                          1.01   1888.9±7.88µs        ? ?/sec    1.00   1864.5±5.66µs        ? ?/sec
physical_plan_clickbench_q26                          1.02   1717.2±4.60µs        ? ?/sec    1.00   1691.7±6.10µs        ? ?/sec
physical_plan_clickbench_q27                          1.02   1915.4±5.73µs        ? ?/sec    1.00   1885.2±5.78µs        ? ?/sec
physical_plan_clickbench_q28                          1.02      2.4±0.01ms        ? ?/sec    1.00      2.3±0.01ms        ? ?/sec
physical_plan_clickbench_q29                          1.02      2.6±0.01ms        ? ?/sec    1.00      2.5±0.01ms        ? ?/sec
physical_plan_clickbench_q3                           1.04   1669.2±9.82µs        ? ?/sec    1.00  1611.0±11.75µs        ? ?/sec
physical_plan_clickbench_q30                          1.02     16.4±0.06ms        ? ?/sec    1.00     16.0±0.08ms        ? ?/sec
physical_plan_clickbench_q31                          1.03      2.5±0.02ms        ? ?/sec    1.00      2.4±0.02ms        ? ?/sec
physical_plan_clickbench_q32                          1.01      2.5±0.01ms        ? ?/sec    1.00      2.4±0.01ms        ? ?/sec
physical_plan_clickbench_q33                          1.01      2.0±0.00ms        ? ?/sec    1.00   1990.0±7.06µs        ? ?/sec
physical_plan_clickbench_q34                          1.00   1744.8±5.37µs        ? ?/sec    1.00   1738.2±7.57µs        ? ?/sec
physical_plan_clickbench_q35                          1.04   1834.2±5.66µs        ? ?/sec    1.00   1769.5±6.80µs        ? ?/sec
physical_plan_clickbench_q36                          1.04      2.2±0.01ms        ? ?/sec    1.00      2.1±0.01ms        ? ?/sec
physical_plan_clickbench_q37                          1.02      2.6±0.01ms        ? ?/sec    1.00      2.5±0.01ms        ? ?/sec
physical_plan_clickbench_q38                          1.01      2.6±0.01ms        ? ?/sec    1.00      2.5±0.01ms        ? ?/sec
physical_plan_clickbench_q39                          1.02      2.6±0.01ms        ? ?/sec    1.00      2.6±0.01ms        ? ?/sec
physical_plan_clickbench_q4                           1.03   1456.7±8.71µs        ? ?/sec    1.00   1411.2±6.36µs        ? ?/sec
physical_plan_clickbench_q40                          1.01      3.4±0.01ms        ? ?/sec    1.00      3.4±0.02ms        ? ?/sec
physical_plan_clickbench_q41                          1.03      3.0±0.01ms        ? ?/sec    1.00      2.9±0.01ms        ? ?/sec
physical_plan_clickbench_q42                          1.03      3.1±0.01ms        ? ?/sec    1.00      3.1±0.01ms        ? ?/sec
physical_plan_clickbench_q43                          1.01      3.3±0.01ms        ? ?/sec    1.00      3.2±0.01ms        ? ?/sec
physical_plan_clickbench_q44                          1.01   1534.9±7.15µs        ? ?/sec    1.00   1514.4±5.77µs        ? ?/sec
physical_plan_clickbench_q45                          1.01   1538.0±8.93µs        ? ?/sec    1.00   1520.3±6.30µs        ? ?/sec
physical_plan_clickbench_q46                          1.02   1861.9±5.86µs        ? ?/sec    1.00   1830.5±6.82µs        ? ?/sec
physical_plan_clickbench_q47                          1.02      2.6±0.01ms        ? ?/sec    1.00      2.6±0.01ms        ? ?/sec
physical_plan_clickbench_q48                          1.01      2.8±0.01ms        ? ?/sec    1.00      2.8±0.01ms        ? ?/sec
physical_plan_clickbench_q49                          1.02      2.9±0.01ms        ? ?/sec    1.00      2.9±0.01ms        ? ?/sec
physical_plan_clickbench_q5                           1.02   1575.2±7.87µs        ? ?/sec    1.00   1545.1±6.80µs        ? ?/sec
physical_plan_clickbench_q50                          1.02      2.9±0.01ms        ? ?/sec    1.00      2.8±0.01ms        ? ?/sec
physical_plan_clickbench_q51                          1.01   1963.3±5.92µs        ? ?/sec    1.00   1937.7±6.25µs        ? ?/sec
physical_plan_clickbench_q6                           1.02   1570.1±8.10µs        ? ?/sec    1.00   1537.3±6.53µs        ? ?/sec
physical_plan_clickbench_q7                           1.02   1605.8±9.22µs        ? ?/sec    1.00   1571.5±5.74µs        ? ?/sec
physical_plan_clickbench_q8                           1.01   1905.0±4.59µs        ? ?/sec    1.00   1880.5±5.46µs        ? ?/sec
physical_plan_clickbench_q9                           1.02   1884.1±5.78µs        ? ?/sec    1.00   1856.1±5.89µs        ? ?/sec
physical_plan_struct_join_agg_sort                    1.03   1361.1±2.73µs        ? ?/sec    1.00   1325.1±2.62µs        ? ?/sec
physical_plan_tpcds_all                               1.02    742.6±1.06ms        ? ?/sec    1.00    727.3±1.05ms        ? ?/sec
physical_plan_tpch_all                                1.02     48.6±0.11ms        ? ?/sec    1.00     47.7±0.20ms        ? ?/sec
physical_plan_tpch_q1                                 1.03   1581.6±3.35µs        ? ?/sec    1.00   1542.7±3.28µs        ? ?/sec
physical_plan_tpch_q10                                1.02      3.0±0.00ms        ? ?/sec    1.00      3.0±0.02ms        ? ?/sec
physical_plan_tpch_q11                                1.02      2.5±0.00ms        ? ?/sec    1.00      2.5±0.01ms        ? ?/sec
physical_plan_tpch_q12                                1.02   1306.4±5.12µs        ? ?/sec    1.00   1284.7±6.71µs        ? ?/sec
physical_plan_tpch_q13                                1.02    989.5±2.52µs        ? ?/sec    1.00    970.2±2.39µs        ? ?/sec
physical_plan_tpch_q14                                1.05   1451.3±3.18µs        ? ?/sec    1.00   1386.1±3.81µs        ? ?/sec
physical_plan_tpch_q16                                1.02  1652.8±10.35µs        ? ?/sec    1.00   1615.3±5.53µs        ? ?/sec
physical_plan_tpch_q17                                1.04  1801.0±16.08µs        ? ?/sec    1.00   1730.6±2.13µs        ? ?/sec
physical_plan_tpch_q18                                1.03   1896.6±8.25µs        ? ?/sec    1.00   1847.2±1.91µs        ? ?/sec
physical_plan_tpch_q19                                1.04      2.5±0.01ms        ? ?/sec    1.00      2.4±0.01ms        ? ?/sec
physical_plan_tpch_q2                                 1.01      4.3±0.01ms        ? ?/sec    1.00      4.3±0.01ms        ? ?/sec
physical_plan_tpch_q20                                1.02      2.4±0.01ms        ? ?/sec    1.00      2.3±0.00ms        ? ?/sec
physical_plan_tpch_q21                                1.02      3.1±0.01ms        ? ?/sec    1.00      3.1±0.00ms        ? ?/sec
physical_plan_tpch_q22                                1.02      2.0±0.01ms        ? ?/sec    1.00   1997.6±7.99µs        ? ?/sec
physical_plan_tpch_q3                                 1.02      2.0±0.00ms        ? ?/sec    1.00   1975.5±3.67µs        ? ?/sec
physical_plan_tpch_q4                                 1.01   1152.5±9.95µs        ? ?/sec    1.00  1146.0±12.20µs        ? ?/sec
physical_plan_tpch_q5                                 1.02      2.6±0.02ms        ? ?/sec    1.00      2.6±0.02ms        ? ?/sec
physical_plan_tpch_q6                                 1.06    669.8±2.18µs        ? ?/sec    1.00    629.2±1.70µs        ? ?/sec
physical_plan_tpch_q7                                 1.01      3.2±0.01ms        ? ?/sec    1.00      3.2±0.00ms        ? ?/sec
physical_plan_tpch_q8                                 1.01      4.2±0.02ms        ? ?/sec    1.00      4.1±0.01ms        ? ?/sec
physical_plan_tpch_q9                                 1.01      2.9±0.01ms        ? ?/sec    1.00      2.9±0.01ms        ? ?/sec
physical_select_aggregates_from_200                   1.01     14.5±0.03ms        ? ?/sec    1.00     14.4±0.04ms        ? ?/sec
physical_select_all_from_1000                         1.04     18.0±0.04ms        ? ?/sec    1.00     17.3±0.03ms        ? ?/sec
physical_select_one_from_700                          1.04   726.4±13.42µs        ? ?/sec    1.00    696.7±1.88µs        ? ?/sec
physical_sorted_union_order_by_10_int64               1.02      4.8±0.03ms        ? ?/sec    1.00      4.7±0.01ms        ? ?/sec
physical_sorted_union_order_by_10_uint64              1.03     11.6±0.03ms        ? ?/sec    1.00     11.3±0.02ms        ? ?/sec
physical_sorted_union_order_by_50_int64               1.03    115.8±0.40ms        ? ?/sec    1.00    112.1±0.23ms        ? ?/sec
physical_sorted_union_order_by_50_uint64              1.02    606.6±2.34ms        ? ?/sec    1.00    595.4±1.66ms        ? ?/sec
physical_theta_join_consider_sort                     1.03   1053.4±2.46µs        ? ?/sec    1.00   1018.6±3.86µs        ? ?/sec
physical_unnest_to_join                               1.05   1216.3±2.85µs        ? ?/sec    1.00   1158.5±3.86µs        ? ?/sec
physical_window_function_partition_by_12_on_values    1.04    753.8±1.40µs        ? ?/sec    1.00    724.8±2.72µs        ? ?/sec
physical_window_function_partition_by_30_on_values    1.03   1506.8±3.50µs        ? ?/sec    1.00   1457.6±2.94µs        ? ?/sec
physical_window_function_partition_by_4_on_values     1.05    451.1±1.13µs        ? ?/sec    1.00    429.5±1.24µs        ? ?/sec
physical_window_function_partition_by_7_on_values     1.05    561.8±2.01µs        ? ?/sec    1.00    536.4±1.55µs        ? ?/sec
physical_window_function_partition_by_8_on_values     1.04    603.1±1.93µs        ? ?/sec    1.00    579.7±1.45µs        ? ?/sec
with_param_values_many_columns                        1.02    462.5±2.36µs        ? ?/sec    1.00    455.3±2.05µs        ? ?/sec

Resource Usage

base (merge-base)

Metric Value
Wall time 1245.3s
Peak memory 19.7 GiB
Avg memory 19.6 GiB
CPU user 1488.5s
CPU sys 1.9s
Peak spill 0 B

branch

Metric Value
Wall time 1245.3s
Peak memory 19.7 GiB
Avg memory 19.7 GiB
CPU user 1488.8s
CPU sys 1.2s
Peak spill 0 B

File an issue against this benchmark runner

@Dandandan Dandandan added this pull request to the merge queue Apr 21, 2026
Merged via the queue into apache:main with commit 526f0cb Apr 21, 2026
39 checks passed
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Benchmark for this request hit the 7200s job deadline before finishing.

Benchmarks requested: tpch

Kubernetes message
Job was active longer than specified deadline

File an issue against this benchmark runner

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@neilconway which tool are you using for profiling, I wonder?

I've been using samply for CPU profiling and dhat-rs for profiling heap allocations.

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Reduce allocation churn in tree rewriting

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