Advance SNES CPU and ROM coverage#146
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The hofs_extra=1 for main was designed for pseudo-512 horizontal interleaving. In interlace mode with screen_y-based compositing, hofs_extra must be 0 for both screens to prevent 1-pixel horizontal shift per line.
…ne has unique bg_y) Per user feedback: height_ratio stretching is incorrect for interlace. Each of the 448 output lines now has its own unique bg_y=presented_y+vofs, rather than sharing a presented_y across 2 output lines.
Use presented_y=screen_y/field_ratio where field_ratio=2 for interlace, 1 for non-interlace. This keeps the correct field-to-output scanline mapping (224 field scanlines over 448 output lines) while avoiding needless stretching in non-interlace modes. Combined with screen_y-based main/sub compositing, interlace fields now scroll at the correct speed.
Non-interlace: bg_y = presented_y + 1 + vofs (VBlank pre-fetch compensation) Interlace: bg_y = presented_y + 0 + vofs (no pre-fetch, fields scroll independently) This fixes the 9px upward shift in interlace mode.
Per spec, the VOFFS adjustment (vofs bit 0 clear/set) is for screen interlace (SETINI bit 3). Mode 5/6 pseudo-512 mode disables this adjustment (matched to bsnes io.interlace && !io.pseudo condition). This fixes the 1px field-to-field shift in interlace mode.
…separation With VOFFS enabled, even/odd fields show different pixel data (vofs bit 0 differs by 1), so no stretching occurs despite ratio mapping one presented_y to two output lines. This combination fixes both the scroll speed and the interlace field separation.
…S field separation" This reverts commit d165090.
Per spec: VOFFS bit-0 adjustment controlled by SETINI bit 3, not bit 0. For Mode 5 pseudo-512 (SETINI bit 0 = 1, bit 3 = 0): VOFFS not applied, matching bsnes 'io.interlace && !io.pseudo' condition.
…itional statements
…rendering - fix(bg1): use 10-bit tile number in Mode 5/6 by reading bits 12-13 as high tile bits (replacement for bits 8-9 consumed by OPT) - fix(bg1): correct palette bit offset in bg1_pixel_opt_wrapped from bits 11-12 to bits 10-11, matching bg1_pixel - fix(bg1): add field_y = screen_y / 2 for interlace mode so tilemap Y stays within the 224-line field boundary per each field - fix(bg1): remove special row_offset formula for 32-wide tilemap interlace; use linear screen_y * render_width
… OPT path In Mode 5/6 the tile number is always 10 bits (entry & 0x03FF), the same as standard modes. Bits 8-9 are NOT offset-per-tile in the tilemap entry; the 16-pixel-wide tiles are handled by the existing subtile mechanism (tile_pixel_x / 8 giving two 8x8 subtiles). - Remove the OPT code path (bg1_pixel_opt_wrapped) that incorrectly consumed bits 8-9 from the tile number - Remove the bit 12-13 workaround that compensated for the false OPT split - Unify tile_number extraction to entry & 0x03FF across all modes
…ate rendering logic
…, and obj rendering
- Add RenderContext struct with pre-allocated intermediate buffers - Change render_screen signature to take &mut RenderContext - Remove RenderedScreen struct (replaced by FrameBuffer) - Update backdrop/color functions to take &mut [u8] - Add snes/device/ empty crate - Update all callers: rom_test, GUI runtime, tests
Phase 0b: SNES RenderContext refactoring
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