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๐Ÿ‘พ
Sapere aude.
๐Ÿ‘พ
Sapere aude.
17 followers · 35 following

Achievements

Achievement: QuickdrawAchievement: Pair Extraordinairex2Achievement: StarstruckAchievement: YOLOAchievement: Pull Sharkx2Achievement: Arctic Code Vault Contributor

Achievements

Achievement: QuickdrawAchievement: Pair Extraordinairex2Achievement: StarstruckAchievement: YOLOAchievement: Pull Sharkx2Achievement: Arctic Code Vault Contributor

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@cad-polito-it

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franout/README.md

Hello world ๐Ÿ‘‹

  • ๐Ÿ”ญ I worked (hard!) on my PhD in Computer Engineering @ Politecnico di Torino on "System-Level-Test techniques for Automotive SoCs"
  • M.Sc. in Embedded Systems Engineering @ Politecnico di Torino, Italy, A.Y. 2020.
  • Erasmus Student @ Chalmers University of Technology during A.Y. 2019/2020
  • ๐ŸŒฑ Iโ€™m currently learning.
  • ๐Ÿ‘ฏ Iโ€™m looking to collaborate on Real-Time Operating Systems.

๐— ๐˜† ๐—ง๐—ฒ๐—ฐ๐—ธ ๐—ฆ๐˜๐—ฎ๐—ฐ๐—ธ

Python C++ Shell AssemblyScript

Ansible Git GitLab GitHub

TCL - System Verilog - Verilog - VHDL

๐—ฆ๐˜๐—ฎ๐˜๐˜€

franout's github stats

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  1. cad-polito-it/chipyard cad-polito-it/chipyard Public

    Forked from ucb-bar/chipyard

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more for CAD group's servers

    Scala

  2. cad-polito-it/hammer cad-polito-it/hammer Public

    Forked from ucb-bar/hammer

    Hammer: Highly Agile Masks Made Effortlessly from RTL

    Python

  3. Cogitantium Cogitantium Public

    Hardware Accelerator for ML

    VHDL 5 1

  4. freertos_meets_riscv freertos_meets_riscv Public

    A RISCV implementation of freeRTOS for Comet Simulator

    C

  5. micrium_meets_riscv micrium_meets_riscv Public

    A RISCV implementation of uC-OSIII for Comet Simulator

    C 1

  6. PTLIX PTLIX Public

    Portable Test Library Interface for different RTOSs and Software Test Libraries

    C